1. Field of the Invention
The present invention relates to a grid array substrate, and more specifically, to a grid array with reduced power and ground impedance under high frequency.
2. Description of the Prior Art
The higher operation speed of an IC(Integrated Circuit) leads to a higher impedance of circuit which may result in both signal distortion and lag. Therefore, the spatial layout of a circuit needs to be considered in order to lower the impedance of a package.
Please refer to FIG. 1. FIG. 1 shows a diagram of a conventional ball grid array (BGA) package 10 for holding a die 12. The die 12 obtains the required power from a printed circuit board (not shown) through the BGA package 10.
The BGA package 10 comprises a substrate 14, a recessed die cavity 16 installed on the substrate 14 for holding the die 12, a top power plane 18 provided on the top surface of the substrate 14 and located adjacent to the periphery of the recessed die cavity 16, and a power ring 20 plated with Ni and Au for wire bonding, which is located on the top edge of the top power plane. The die 12 is connected to the power ring 20 through a plurality of bond wires 22. A bottom power plane 24 is provided on the bottom surface of the substrate 12, and connected to the top power plane 18 through a via 26 provided within the substrate 14. A plurality of solder balls 28 provided on the bottom surface of the bottom power plane 24 electrically connect the printed circuit board to the bottom power plane 24. Many signal traces with radiated arrangement (not shown) are provided adjacent to outer edge of the power plane 18.
In the prior art BGA package 10, the power travels in an order through the solder balls 28, the second conductive layer 24, the circuit via 26, the first conductive layer 18, the power ring 20, the bond wires 22 and finally to the die 12. Since the total impedance Z=R+jxcfx89L, the decrease in the value of the resistance leads to an overall reduction in the value of the impedance. In order to lower the resistance produced during power transfer, the shortest route is taken whereby the via 26 is located closer to the recessed die cavity 16 than the solder balls 28.
The above route keeps the resistance low but ineffectively reduces the inductance. During the high frequency operation range, inductance dominates the total impedance (Z=R+jxcfx89L). High impedance will cause phenomena such as power bounce and voltage degradation, without achieving the packaging requirement of both high speed and high density.
It is an object of the present invention to provide a grid array package with reduced impedance under high frequency to solve the above-mentioned problem.
In accordance with the claimed invention, the present invention provides a ball grid array package (and can be applied to other types of grid array substrate such as PGA) to hold a die, wherein the die accesses its operational power from a printed circuit board through the BGA package. The BGA package comprises a substrate, with a recessed die cavity installed on the substrate for holding the die. A first conductive layer is provided on the top surface of the substrate, and is located adjacent to the periphery of the recessed die cavity. A power ring is also located adjacent to the periphery of the recessed cavity to connect the first conductive layer to the recessed die cavity. A second conductive layer is provided on the bottom surface of the substrate. A plurality of vias provided within the substrate connect the first conductive layer to the second conductive layer. A plurality of solder balls are provided on the bottom surface of the second conductive layer to connect the printed circuit board to the second conductive layer. The solder balls locate closer to the recessed die cavity than the via. Power is transferred in an order through the solder balls, the second conductive layer, the circuit via, the first conductive layer, the power ring and finally to the die. The direction of current flow through the second conductive layer is opposite to that through the first conductive layer. The opposing directions of the current flow result in the cancellation of the magnetic fields produced by the current flows through the conductive layers, so as to significantly decrease the impedance of the substrate.
It is an advantage of the present invention that the opposing directions of current flows through the conductive layers cancel out the magnetic fields produced. The effect results in a sharp decrease in impedance to remove the effects of both power bounce and power degradation.
These and other objectives of the present invention will become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiments accompanied with the drawings.